• Prodction  

    Technology Levels
    Standard Current standard capability
    Advanced Current capability with a modest premium
    Emerging Have experience and can fabricate on request
    Future Process development project based on customer request and joint collaboration
    RF Micro Wave Technology Roadmap(1)
      inch [mm] Standard Advanced Emerging Future
      inch [mm] 2021 2021 2021-2022 2023
    Key Attributes Layer Count Up 8L 10L to 12L 14L to 16L 16+L
    Min/Max Thickness .012” [.30]/.075" [1.9] .008" [.20]/.125" [3.2] .008” [.20]/.220" [5.6] TBD/.250" [6.4]
    Largest Panel 18x24[457x610] 21x24 [533 x 610] 24x30 [610 x 762] TBD
     
    Minimum
    Line & Space
    (Copper Wts*)
    O/L Line Width/Space .003.5" [.089] H .002.5" [.064] Q <.002" [.05] 5um .0015" [.038] 5um
    I/L Line Width/Space .003.5" [.089] 1 .002.5" [.064] T <.002" [.05] 5um .0015 [.0538] 5um
    Tolerance ±.0005" [.013] ±.0003" [.008] ±.0002" [.005] ±.0002" [.005]
     
    Drilled Vias Size Drill Size .008" [.20] .006" [.15] .005" [.255] .004" [.10]
    Pad Diameter +.008" [.20] +.008" [.20] +.006" [.15] +.005" [.125]
    Aspect Ratio 10:1 12:1 15:1 20:1
    RF Micro Wave Technology Roadmap(2)
      inch [mm] Standard Advanced Emerging Future
      inch [mm] 2021 2021 2021-2022 2023
    Via Structures Microvia layers 1+N+1 2+N+2 3+N+3 ELIC/Anylayer
    Buried Subs Yes Yes Yes Yes
    Stacked Microvia Stacked on Sub Yes Yes Yes
     
    Microvias
    Line & Space
    (Copper Wts*)
    Min Via Size .004" [.10] .003" [.076] .002" [.05] .002" [.05]
    Pad Diameter +.006" [.15] +.006" [.15] +.004" [.10] +.004" [.10]
    Aspect Ratio 0.8:1 0.8:1 0.8:1 1:1
     
    Conductive & NonConductive Via Fill After Cu Plate Min Hole Size .008" [.20] .008" [.20] .006" [.15] .006" [.15]
    Aspect Ratio 10:1 15:1 20:1 25:1
    RF Micro Wave Technology Roadmap(3)
      inch [mm] Standard Advanced Emerging Future
      inch [mm] 2021 2021 2021-2022 2023
    Soldermask Registration ±.002" [.05]/td> ±.0015" [.038] ±.001" [.025] Tangency
    Min Opening .004" [.10] .003" [.076] .003" [.076] SMDP
    Dam Min Width .003" [.076] .002" [.05] .002" [.05] Eng Eval
     
    Surface Finishes ENIG, OSP ENEPIG Thick Gold Multiple Finishes TBD
    Im Sn, Wire Bondable Gold
    LF HASL Multiple Finishes
    Im Ag
     
    Conductive & NonConductive Via Fill After Cu Plate Min Hole Size .008" [.20] .008" [.20] .006" [.15] .006" [.15]
    Aspect Ratio 10:1 15:1 20:1 25:1
    RF Micro Wave Technology Roadmap(4)
      inch [mm] Standard Advanced Emerging Future
      inch [mm] 2021 2021 2021-2022 2023
    Controlled Impedance Tolerance ± 10% ± 8% ± 5% TBD
    Drill to Copper .008" .006" [.15] <.006" [.15] .004" [.10]
    Min Annular Ring Tangency Drill+.008"[.20] Drill+.006"[.15] Drill+<.006"[.15] Drill+.005"[.13]
    Feature to PCB Edge .020" [.50] .015" [.38] .010" [.25] <.010" [.25]
    Hole to PCB Edge .020" [.50] .015" [.38] .010" [.25] <.010" [.25]
    Rout Tolerance ±.008”/.004" [.20/.10] ±.006“/.004”[.15/.10] ±.002”/.002" [.05/.05] <±.002” [.05] applications
    Sequential Lamination Yes Yes Yes Yes
    Back Drill Yes Yes Yes Yes
    Back Drill Tolerance ±.008" [.20] ±.006" [.15] <±.006" [.15] Eng Eval
     
    Technology Development
    Chief Technology Officer David Aldape, 30+ years of advance technology experience, leads a dedicated team of R&D Engineers.
    Development projects for 2020 - 2022:
    High Aspect Ratio Copper Plating
    Increase Layer Count, Very Thin MLs/MV Technology
    Controlled impedance tolerance of ± 5% or less
    Advanced imaging and etching methods for ultra fine lines
    Advanced tooling systems for improving L2L registration
    Continual addition of new materials for HDI, High Speed Low Loss and High Speed Very Low Loss (5G materials**)
    ELIC (Every Layer Inner Connect)and Deep MVs
    Thermal Management Solutions: Copper Coin, Embedded Components PCBs and All in One Packages
    mSAP and SAP processing technology

    Technology Advancement 2016

    Reverse Pulse Plating

    Improved Surface to Hole Throwing Power

    Superior IST Performance

    Decreased Cycle Time

    High Reliability

    • Automated Test Equipment (ATE) Technology

    • Device Under Test (DUT) Technology/Burn in Board Technology

    • High Layer Count Back Planes

    Direct Imaging

    Optical CCD Alignment accuracy +/- 7um

    Fine Line Resolution <.002” Lines (50um)

    Multi Wave Length for Solder Mask Exposure

    SM Opening down to 80um

    Technology Advancement 2017

    XACT Material Predation Software

    Automate accurate manufacturing data with advanced predictive material scale factors

    Helps control and analyze for improved registration capability.

    Advanced M/L Tooling System

    Direct Optical Registration System

    Pinless lamination for M/L, Sequential Lam

    Vision System CCD cameras

    • Improved positioning repeatability +/- 17 microns

    • Improved readability and statistical data collection

    • Increased panel usage area compared to traditional lamination

    Technology Advancement 2018/2019

    UL Material Qualification Program

    Continual Advancement in new materials

    Isola: Tachyon 100G I-Tera®, Astra MT

    Panasonic: Megtron 7N

    EMC : EM 891/K

    5G and RF/Micro wave materials

    Direct Plate Chemistry

    Eliminates ICDs

    High Thermal Stability

    Excellent for High Layer Count

    Micro Via and Flex Technology

    Technology Advancement 2019/2020

    Deep Micro Via Technology

    Provide additional routing density

    Improved Impedance Performance

    Solid Copper Plated Surface for BGAs

    Improved Current Carrying Capacity

    Every Layers Inner Connect

    ELIC maximizes design freedom

    Solid Copper provides better reliability

    Superior Electrical characteristics

    Technology Advancement 2020/2021

    Solid Copper Plate Vias

    Diameters .005-.012”

    Fine Pitch Traces/Space

    Thermal conductivity (385 W/mK)

    Copper Coin PCBs

    Improved Heat Distribution

    Thermal Conductivity (385 W/mK)

    Solid copper press fit into the board

    Through Hole can be connected as well

    PTFE Base Station Product

    RF Microwave Product

    Cavity and Special Dielectrics

    Layer Count: 2 to 10 Layers

    Material Options: Rogers (4350B, 3010, 4003C), Taconic (RF35, TLX, TLY)

    Hybrid Option: RO4350B + FR4

    Finishes: ENIG, Wire Bondable Gold, Flash Gold

    Finishes: ENIG, Wire Bondable Gold, Flash Gold

    Special Process: Cavities, Selective Plating and Etching

    Applications: Radio Trans‐receivers, Antennas, Power Amplifiers